All Research Sponsored By:Texas Instruments, Inc.
-
TMS320C6000 Memory Test
This set of programs has been compiled to provide a way to verify the integrity of internal DSP memory and external system memory for all devices currently in the TMS320C6000 (C6000) family.
-
IEEE 1149.1 Use in Design for Verification and Testability at Texas Instruments
This document introduces those products that include ASIC cells, standard interface ICs, a bus master IC, a controller interface board for IBM compatibles, a high-speed scan interface, and software to control the scan bus.
-
Design-for-Test Analysis of a Buffered SDRAM DIMM
This document presents a design-for-test analysis of a buffered synchronous dynamic random access memory dual in-line memory module.
-
Built-in Self-test (BIST) Using Boundary Scan
This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture.
-
FIFO Solutions for Increasing Clock Rates and Data Widths
Steady increases in microprocessor operating frequencies and bus widths over recent years have challenged system designers to find FIFO memories that meet their needs.