Built-in Self-test (BIST) Using Boundary Scan
The IEEE standard boundary scan framework and four-wire serial testablity are having a positive impact on testing all levels of electronic assembly. The two form a basis from which other techniques are developed to facilitate testing of chips and systems. This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture. A boundary BIST approach is described and compared to a purely scan operated boundary test approach.