Integrated Circuit Test Equipment Research
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IEEE 1149.1 Use in Design for Verification and Testability at Texas Instruments
Sponsored by: Texas Instruments, Inc.This document introduces those products that include ASIC cells, standard interface ICs, a bus master IC, a controller interface board for IBM compatibles, a high-speed scan interface, and software to control the scan bus.
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Design-for-Test Analysis of a Buffered SDRAM DIMM
Sponsored by: Texas Instruments, Inc.This document presents a design-for-test analysis of a buffered synchronous dynamic random access memory dual in-line memory module.
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Built-in Self-test (BIST) Using Boundary Scan
Sponsored by: Texas Instruments, Inc.This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture.